Combinational logic functions are basic building blocks of digital electronic circuits. As is well known, any combinational function can be specified as a boolean logic function of its inputs, and this function can be implemented in a logic circuit. By expressing boolean logic functions in sum of products (SOP) or product of sums (POS) form, it becomes a straightforward task to implement them with two-stage logic circuits (e.g., AND-OR, NAND-NAND, or NOR-NOR circuits). These two-stage circuits can be classified as product-term or Pterm-based circuits and can be implemented directly by electrically connecting those logic gates that are required to produce a desired function.
Programmable logic arrays (PLAs) are integrated circuits that can include multiple general-purpose product-term cells, which a designer can configure to implement specific combinational logic circuits. PLAs can be mask-based arrays that are permanently configured during semiconductor processing to form application-specific integrated circuits (ASICs). Alternatively, they can be field-programmable, which means that they can be electrically programmed and reprogrammed with relative ease. Generally, designers configure PLAs by defining current paths within the cells to obtain a product-term circuit that performs a desired logic function (e.g., by closing electrically erasable links). PLAs often use so-called wired-OR or wired-AND configurations to implement their second stages, and larger PLA-based integrated circuits, known as complex programmable logic devices, can include numerous AND-OR PLA-based blocks that typically have partially fixed OR planes.
The denser field programmable integrated circuits have generally been field programmable gate arrays (FPGAs), which have employed look-up tables (LUTs) based on static random access memory programming (SRAM) technology instead of product-term architectures. In LUTs, the input states address an entry in a user-defined table that contains a stored output value that corresponds to those input states for a desired function. Designers can rewrite the data in the table to define different logic functions. Some research has indicated that four or five input LUTs in FPGAs result in the best results in terms of chip area. Using LUTs of different sizes in an integrated circuit has also been proposed.
One important use for FPGAs is in prototyping and ASIC emulation. In addition, FPGAs can also be acceptable substitutes for smaller ASICs. But because FPGAs can have a significant programming overhead, even high capacity field programmable devices tend to be significantly slower and less area-efficient than ASICs. This can limit their usefulness in a variety of situations, particularly where cost and/or speed are significant considerations.